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Principal Design Verification Engineer
Mountain View, CA
Job Description
OverviewMicrosoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality. We are looking for a Principal Design Verification Engineer to work on leading edge IP (intellectual property) development as part of the Semi-custom and Central IP Silicon team(SCIPS). The candidate should be a self-starter who will thrive in this cutting-edge technical environment. Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond. In alignment with our Microsoft values, we are committed to cultivating an inclusive work environment for all employees to positively impact our culture every day.
ResponsibilitiesEstablish yourself as an integral member of a pre-silicon verification and post-silicon validation team for the development of customIntellectual Property (IP)components. Define pre-Si verification (simulation/emulation/formal proofs/FPGA-testing ((field-programmable gate array)) and post-Silicon validation strategies. Work with a team to write, execute, enhance, and debug constrained random stimulus, scoreboards and checkers, and assertions to verify design correctness. DevelopUniversal Verification Methodology(UVM)components to interface between test code and verification simulation environments. Define and implement functional coverage and drive coverage closure. Collaborate across verification teams on vertical and horizontal reuse of components. Interact with Architecture, Design, Firmware/Software, Product Engineering, Program Management and third party vendor teams to ensure pre-and-post-Si testing is comprehensive. Writescripts for verification and validation infrastructure. Apply Agile development methodologies including code reviews, sprint planning, and feature deployment. Providetechnical leadership through mentor-ship and teamwork. OtherEmbody our Culture and Values
ResponsibilitiesEstablish yourself as an integral member of a pre-silicon verification and post-silicon validation team for the development of customIntellectual Property (IP)components. Define pre-Si verification (simulation/emulation/formal proofs/FPGA-testing ((field-programmable gate array)) and post-Silicon validation strategies. Work with a team to write, execute, enhance, and debug constrained random stimulus, scoreboards and checkers, and assertions to verify design correctness. DevelopUniversal Verification Methodology(UVM)components to interface between test code and verification simulation environments. Define and implement functional coverage and drive coverage closure. Collaborate across verification teams on vertical and horizontal reuse of components. Interact with Architecture, Design, Firmware/Software, Product Engineering, Program Management and third party vendor teams to ensure pre-and-post-Si testing is comprehensive. Writescripts for verification and validation infrastructure. Apply Agile development methodologies including code reviews, sprint planning, and feature deployment. Providetechnical leadership through mentor-ship and teamwork. OtherEmbody our Culture and Values
Job Summary
Company
Start Date
As soon as possible
Employment Term and Type
Regular, Full Time
Required Experience
Open
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